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 INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT583 4-bit full adder with fast carry
Product specification Supersedes data of December 1990 File under Integrated Circuits, IC06 1998 Mar 31
Philips Semiconductors
Product specification
4-bit full adder with fast carry
FEATURES * Adds two decimal numbers * Full internal look-ahead * Fast ripple carry for economical expansion * Output capability: standard driver * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT583 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JECEC standard no. 7A. The 74HC/HCT583 are high-speed 4-bit BCD full adders with internal carry look-ahead. They accept two 4-bit decimal numbers (A0 to A3 and B0 to B3) and a carry input (CIN). QUICK REFERENCE DATA GND = 0 V; Tamb= 25 C; tr = tf = 6 ns
74HC/HCT583
The "583" generates the decimal sum outputs (0 to 3) and a carry output (Cn+4) if the sum is greater than 9. If an addition of two BCD numbers produce a number greater than 9, a valid BCD number and a carry will result. For input values larger than 9, the number is converted from binary to BCD. Binary to BCD conversion occurs by grounding one set of inputs, An or Bn and applying a 4-bit binary number to the other set of inputs. If the input is between 0 and 9, a BCD number occurs at the output. If the binary input falls between 10 and 15, a carry term is generated. Both the carry term and the sum are the BCD equivalent of the binary input. Converting binary numbers greater than 16 may be achieved by cascading "583s". See the "283" for the binary version.
TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay CIN to Cn+4 An, Bn to Cn+4 CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 20 23 3.5 116 23 27 3.5 120 ns ns pF pF HCT UNIT
1998 Mar 31
2
Philips Semiconductors
Product specification
4-bit full adder with fast carry
ORDERING INFORMATION TYPE NUMBER 74HC583 74HC583 74HCT583 74HCT583 PACKAGE NAME DIP16 SO16 DIP16 SO16 DESCRIPTION plastic dual in-line package; 16 leads (300 mil); long body plastic small outline package; 16 leads; body width 3.9 mm plastic dual in-line package; 16 leads (300 mil); long body plastic small outline package; 16 leads; body width 3.9 mm
74HC/HCT583
VERSION SOT38-1 SOT109-1 SOT38-1 SOT109-1
PIN DESCRIPTION PIN NO. 5 6 8 11, 10, 7, 9 12, 1, 2, 3 13, 14, 15, 4 16 SYMBOL CIN Cn+4 GND 0 to 3 B0 to B3 A0 to A3 VCC NAME AND FUNCTION carry input carry output ground (0 V) sum outputs B operand inputs A operand inputs positive supply voltage
handbook, halfpage
B1 1 B2 2 B3 3 A3 4 CIN 5 Cn + 4 6 2 7 GND 8
MGM851
16 VCC 15 A2 14 A1
583
13 A0 12 B0 11 0 10 1 9 3
Fig.1 Pin configuration.
handbook, halfpage
13 14
handbook, halfpage
0
(BCD)
P 0 11 10 3 Q 7 9
A0 13
B0 12
A1 14 1
B1
A2 15 2
B2 4
A3 3
B3 Cn + 4
15 4 3 0
CIN
5 11 0 10 1 7 2 9 3
6
12 1 2
MGM852
3 5
3 C1 C0
MGM853
6
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
1998 Mar 31
3
Philips Semiconductors
Product specification
4-bit full adder with fast carry
74HC/HCT583
handbook, halfpage
A0 13
B0 A1 B1 A2 12 14 1 15
B2 2
A3 4
B3 3 6 Cn + 4
CIN 5
11 0
10 1
7 2
9 3
MGM854
Fig.4 Functional diagram.
1998 Mar 31
4
Philips Semiconductors
Product specification
4-bit full adder with fast carry
74HC/HCT583
handbook, full pagewidth
S0
B0
A0 S1
B1
A1
B2
A2
S2
B3
S3 A3
CIN Cn + 4
MGM856
Fig.5 Logic diagram.
1998 Mar 31
5
Philips Semiconductors
Product specification
4-bit full adder with fast carry
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25
min. typ. max.
74HC/HCT583
TEST CONDITIONS UNIT V WAVEFORMS CC (V) ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6
-40 to +85
min. max.
-40 to +125
min. max.
tPHL/ tPLH
propagation delay CIN to 0 propagation delay CIN to 1 propagation delay CIN to 2 propagation delay CIN to 3 propagation delay An or Bn to 0 propagation delay An or Bn to 1 propagation delay An or Bn to 2 propagation delay An or Bn to 3 propagation delay CIN to Cn+4 propagation delay An to Cn+4
50 18 14 113 41 33 100 36 29 110 40 32 50 18 14 120 43 34 105 38 30 116 42 34 63 23 18 72 26 21
155 31 26 350 70 60 305 61 52 340 68 58 155 31 26 365 73 62 325 65 55 355 71 60 195 39 33 220 44 37
195 39 33 440 88 75 380 76 65 425 85 72 195 39 33 455 91 77 405 81 69 445 89 76 245 49 42 275 55 47
235 47 40 525 105 90 460 92 78 510 102 87 235 47 40 550 110 94 490 98 83 535 107 91 295 59 50 330 66 56
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
1998 Mar 31
6
Philips Semiconductors
Product specification
4-bit full adder with fast carry
74HC/HCT583
Tamb (C) 74HC SYMBOL PARAMETER +25
min. typ. max.
TEST CONDITIONS WAVEFORMS UNIT V CC (V) ns 2.0 4.5 6.0 ns 2.0 4.5 6.0 Fig.6 Fig.6
-40 to +85
min. max.
-40 to +125
min. max.
tPHL/ tPLH
propagation delay Bn to Cn+4 output transition time standard outputs
74 27 22 19 7 6
230 46 39 75 15 13
290 58 49 95 19 16
345 69 59 110 22 19
tTHL/ tTLH
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT An, Bn CIN
UNIT LOAD COEFFICIENT 0.4 1.5
1998 Mar 31
7
Philips Semiconductors
Product specification
4-bit full adder with fast carry
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER +25
min. typ. max.
74HC/HCT583
TEST CONDITIONS UNIT V WAVEFORMS CC (V) ns ns ns ns ns ns ns ns ns ns ns ns 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6 Fig.6
-40 to +85
min. max.
-40 to +125
min. max.
tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tTHL/ tTLH
propagation delay CIN to 0 propagation delay CIN to 1 propagation delay CIN to 2 propagation delay CIN to 3 propagation delay An or Bn to 0 propagation delay An or Bn to 1 propagation delay An or Bn to 2 propagation delay An or Bn to 3 propagation delay CIN to Cn+4 propagation delay An to Cn+4 propagation delay Bn to Cn+4 output transition time standard outputs
20 40 38 38 22 43 40 41 27 31 30 7
34 68 65 65 37 73 68 70 46 53 51 15
43 85 81 81 46 91 85 88 58 66 64 19
51 102 98 98 56 110 102 105 69 80 77 22
1998 Mar 31
8
Philips Semiconductors
Product specification
4-bit full adder with fast carry
AC WAVEFORMS
74HC/HCT583
book, full pagewidth
CIN, An, Bn INPUT
VM(1)
tPHL n, Cn + 4 OUTPUT tTHL
tPLH
VM(1)
tTLH
MGM855
(1)
HC: VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6
Waveforms showing the inputs (CIN, An, Bn) to the outputs (n, Cn+4) propagation delays and the output transition times.
1998 Mar 31
9
Philips Semiconductors
Product specification
4-bit full adder with fast carry
PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body
74HC/HCT583
SOT38-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.020 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-10-02 95-01-19
1998 Mar 31
10
Philips Semiconductors
Product specification
4-bit full adder with fast carry
74HC/HCT583
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A X
c y HE vMA
Z 16 9
Q A2 A1 pin 1 index Lp 1 e bp 8 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
0.010 0.057 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07S JEDEC MS-012AC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-23 97-05-22
1998 Mar 31
11
Philips Semiconductors
Product specification
4-bit full adder with fast carry
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
74HC/HCT583
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Mar 31
12
Philips Semiconductors
Product specification
4-bit full adder with fast carry
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
74HC/HCT583
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Mar 31
13


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